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 FDMS9600S Dual N-Channel PowerTrench(R) MOSFET
FDMS9600S
Features
Q1: N-Channel
September 2008
tm
Dual N-Channel PowerTrench(R) MOSFET
Q1: 30V, 32A, 8.5m Q2: 30V, 30A, 5.5m
General Description
This device includes two specialized MOSFETs in a unique dual Power 56 package. It is designed to provide an optimal Synchronous Buck power stage in terms of efficiency and PCB utilization. The low switching loss "High Side" MOSFET is complemented by a Low Conduction Loss "Low Side" SyncFET.
Max rDS(on) = 8.5m at VGS = 10V, ID = 12A Max rDS(on) = 12.4m at VGS = 4.5V, ID = 10A Q2: N-Channel Max rDS(on) = 5.5m at VGS = 10V, ID = 16A Max rDS(on) = 7.0m at VGS = 4.5V, ID = 14A Low Qg high side MOSFET Low rDS(on) low side MOSFET Thermally efficient dual Power 56 package Pinout optimized for simple PCB design RoHS Compliant
Applications
Synchronous Buck Converter for: Notebook System Power General Purpose Point of Load
G1 D1 G2 S1/D2 S2 S2 S2
D1
D1 D1
5 6 7 8
Q2
4 3 2
Q1
1
Power 56
MOSFET Maximum Ratings TA = 25C unless otherwise noted
VGS ID Symbol VDS Parameter Drain to Source Voltage Gate to Source Voltage Drain Current -Continuous (Silicon limited) -Continuous -Pulsed PD TJ, TSTG Power Dissipation for Single Operation Operating and Storage Junction Temperature Range -Continuous (Package limited) TC = 25C TC = 25C TA = 25C Q1 30 20 32 55 (Note 1a) (Note 1a) (Note 1b) 12 60 2.5 1.0 -55 to +150 Q2 30 20 30 108 16 60 W C A Units V V
Thermal Characteristics
RJA RJA RJC Thermal Resistance, Junction to Ambient Thermal Resistance, Junction to Ambient Thermal Resistance, Junction to Case (Note 1a) (Note 1b) 3 50 120 1.2 C/W
Package Marking and Ordering Information
Device Marking FDMS9600S Device FDMS9600S Package Power 56
1
Reel Size 13"
Tape Width 12mm
Quantity 3000 units
www.fairchildsemi.com
(c)2008 Fairchild Semiconductor Corporation FDMS9600S Rev.D1
FDMS9600S Dual N-Channel PowerTrench(R) MOSFET
Electrical Characteristics TJ = 25C unless otherwise noted
Symbol Parameter Test Conditions Type Min Typ Max Units
Off Characteristics
BVDSS BVDSS TJ IDSS IGSS Drain to Source Breakdown Voltage Breakdown Voltage Temperature Coefficient Zero Gate Voltage Drain Current Gate to Source Leakage Current ID = 250A, VGS = 0V ID = 1mA, VGS = 0V Q1 Q2 Q1 Q2 Q1 Q2 Q1 Q2 30 30 35 29 1 500 100 100 V mV/C A nA nA ID = 250A, referenced to 25C ID = 1mA, referenced to 25C VDS = 24V, VGS = 0V VGS = 20V, VDS= 0V
On Characteristics
VGS(th) VGS(th) TJ Gate to Source Threshold Voltage Gate to Source Threshold Voltage Temperature Coefficient VGS = VDS, ID = 250A VGS = VDS, ID = 1mA Q1 Q2 Q1 Q2 Q1 1 1 1.5 1.8 -4.5 -6.0 7.0 9.2 8.6 4.5 5.3 5.4 54 68 8.5 12.4 13.0 5.5 7.0 8.3 3 3 V mV/C ID = 250A, referenced to 25C ID = 1mA, referenced to 25C
rDS(on)
Drain to Source On Resistance
VGS = 10V, ID = 12A VGS = 4.5V, ID = 10A VGS = 10V, ID = 12A , TJ = 125C VGS = 10V, ID = 16A VGS = 4.5V, ID = 14A VGS = 10V, ID = 16A , TJ = 125C VDD = 10V, ID = 12A VDD = 10V, ID = 16A
m
Q2 Q1 Q2
gFS
Forward Transconductance
S
Dynamic Characteristics
Ciss Coss Crss Rg Input Capacitance Output Capacitance Reverse Transfer Capacitance Gate Resistance f = 1MHz VDS = 15V, VGS = 0V, f= 1MHz Q1 Q2 Q1 Q2 Q1 Q2 Q1 Q2 1280 2300 525 1545 80 250 1.0 1.7 1705 3060 700 2055 120 375 pF pF pF
Switching Characteristics
td(on) tr td(off) tf Qg(TOT) Qgs Qgd Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Total Gate Charge Gate to Source Gate Charge Gate to Drain "Miller" Charge Q1 VDD = 15V, VGS = 4.5V, ID = 12A Q2 VDD = 15V, VGS = 4.5V, ID = 16A VDD = 10V, ID = 1A, VGS = 10V, RGEN = 6 Q1 Q2 Q1 Q2 Q1 Q2 Q1 Q2 Q1 Q2 Q1 Q2 Q1 Q2 13 17 6 11 42 54 12 32 9 21 3 8 2.7 6.5 23 31 12 20 67 86 22 51 13 29 ns ns ns ns nC nC nC
FDMS9600S Rev.D1
2
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FDMS9600S Dual N-Channel PowerTrench(R) MOSFET
Electrical Characteristics TJ = 25C unless otherwise noted
Symbol Parameter Test Conditions Type Min Typ Max Units
Drain-Source Diode Characteristics
IS Maximum Continuous Drain-Source Diode Forward Current VGS = 0V, IS = 2.1A V = 0V, IS = 3.5A Source to Drain Diode Forward Voltage GS VGS = 0V, IS = 8.2A Reverse Recovery Time Reverse Recovery Charge Q1 IF = 12A, di/dt = 100A/s Q2 IF = 16A, di/dt = 300A/s (Note 2) (Note 2) (Note 2) Q1 Q2 Q1 Q2 Q2 Q1 Q2 Q1 Q2 0.7 0.4 0.5 33 27 20 33 2.1 3.5 1.2 1.0 1.0 A
VSD trr Qrr
V ns nC
Notes: 1: RJA is determined with the device mounted on a 1in2 pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. RJC is guaranteed by design while RCA is determined by the user's board design. a.50C/W when mounted on a 1 in2 pad of 2 oz copper b. 120C/W when mounted on a minimum pad of 2 oz copper
2: Pulse Test: Pulse Width < 300s, Duty cycle < 2.0%.
FDMS9600S Rev.D1
3
www.fairchildsemi.com
FDMS9600S Dual N-Channel PowerTrench(R) MOSFET
Typical Characteristics (Q1 N-Channel)TJ = 25C unless otherwise noted
60 50
ID, DRAIN CURRENT (A)
NORMALIZED DRAIN TO SOURCE ON-RESISTANCE VGS = 10V PULSE DURATION = 300s DUTY CYCLE = 2.0%MAX VGS = 3.5V VGS = 3V
2.8 2.6 2.4 2.2 2.0 1.8 1.6 1.4 1.2 1.0 0.8 0 10 20 30 40 ID, DRAIN CURRENT(A) 50 60
VGS = 10V VGS = 4.5V VGS = 3V PULSE DURATION = 300s DUTY CYCLE = 2.0%MAX VGS =3.5V VGS = 4V
40 30 20 10 0 0.0
VGS = 6V VGS = 4.5V VGS = 4V
VGS = 6V
0.5 1.0 1.5 VDS, DRAIN TO SOURCE VOLTAGE (V)
2.0
Figure 1. On-Region Characteristics
1.6 1.5 1.4 1.3 1.2 1.1 1.0 0.9 0.8 0.7 -50 -25 0 25 50 75 100 125 150
Figure 2. Normalized On-Resistance vs Drain Current and Gate Voltage
30
rDS(on), DRAIN TO SOURCE ON-RESISTANCE (m)
NORMALIZED DRAIN TO SOURCE ON-RESISTANCE
ID = 12A VGS =10V
25 20 15 10 5 0 2
ID = 6A
PULSE DURATION = 300s DUTY CYCLE = 2.0%MAX
TJ = 125oC
TJ = 25oC
TJ, JUNCTION TEMPERATURE (oC)
4 6 8 VGS, GATE TO SOURCE VOLTAGE (V)
10
Figure 3. Normalized On-Resistance vs Junction Temperature
60
IS, REVERSE DRAIN CURRENT (A)
PULSE DURATION = 300s DUTY CYCLE = 2.0%MAX
Figure 4. On-Resistance vs Gate to Source Voltage
60
VGS = 0V
ID, DRAIN CURRENT (A)
50 40 30 20 10 0 1.0
VDD = 5V
10 1 0.1 0.01 1E-3 0.2
TJ = 125oC TJ = 25oC
TJ =125oC TJ = 25oC TJ = -55oC
TJ = -55oC
1.5 2.0 2.5 3.0 VGS, GATE TO SOURCE VOLTAGE (V)
3.5
0.4 0.6 0.8 1.0 VSD, BODY DIODE FORWARD VOLTAGE (V)
1.2
Figure 5. Transfer Characteristics
Figure 6. Source to Drain Diode Forward Voltage vs Source Current
FDMS9600S Rev.D1
4
www.fairchildsemi.com
FDMS9600S Dual N-Channel PowerTrench(R) MOSFET
Typical Characteristics (Q1 N-Channel)TJ = 25C unless otherwise noted
VGS, GATE TO SOURCE VOLTAGE(V)
10
ID = 12A
2000
VDD =10V
8 6
1000
CAPACITANCE (pF)
Ciss
Coss
VDD = 15V
4
VDD = 20V
100
f = 1MHz VGS = 0V
2 0
Crss
0
5
10
15
20
25
30 0.1
Qg, GATE CHARGE(nC)
1 10 VDS, DRAIN TO SOURCE VOLTAGE (V)
30
Figure 7. Gate Charge Characteristics
Figure 8. Capacitance vs Drain to Source Voltage
P(PK), PEAK TRANSIENT POWER (W)
300
100
ID, DRAIN CURRENT (A)
10
1ms 10ms
SINGLE PULSE TJ = MAX RATE RJA = 120 C/W TA = 25oC THIS AREA IS LIMITED BY rDS(ON)
o
100
VGS = 10V
SINGLE PULSE o RJA = 120 C/W TA = 25 C
o
1
100ms 1s 10s DC
10
0.1
1
0.5 -3 10
0.01 0.1
1
10
100
10
-2
VDS, DRAIN to SOURCE VOLTAGE (V)
10 10 10 t, PULSE WIDTH (s)
-1
0
1
10
2
10
3
Figure 9. Forward Bias Safe Operating Area
2
Figure 10. Single Pulse Maximum Power Dissipation
1
NORMALIZED THERMAL IMPEDANCE, ZJA
DUTY CYCLE-DESCENDING ORDER
0.1
D = 0.5 0.2 0.1 0.05 0.02 0.01
PDM
t1
0.01
SINGLE PULSE
t2 NOTES: DUTY FACTOR: D = t1/t2 PEAK TJ = PDM x ZJA x RJA + TA
0.002
10
-3
10
-2
10
-1
10
0
10
1
10
2
10
3
t, RECTANGULAR PULSE DURATION (s)
Figure 11. Transient Thermal Response Curve
FDMS9600S Rev.D1
5
www.fairchildsemi.com
FDMS9600S Dual N-Channel PowerTrench(R) MOSFET
Typical Characteristics (Q2 SyncFET)
60 50
ID, DRAIN CURRENT (A)
NORMALIZED DRAIN TO SOURCE ON-RESISTANCE
VGS = 10V
2.8
VGS = 4V VGS = 3.5V VGS = 4.5V VGS = 6V VGS = 3V
2.6 2.4 2.2 2.0 1.8 1.6 1.4 1.2 1.0 0.8 0
VGS =3V
PULSE DURATION = 300s DUTY CYCLE = 2.0%MAX
40 30 20 10 0 0.0
VGS = 6V
VGS = 4.5V
VGS = 3.5V VGS = 4V
PULSE DURATION = 300s DUTY CYCLE = 2.0%MAX
VGS = 10V
0.2 0.4 0.6 0.8 VDS, DRAIN TO SOURCE VOLTAGE (V)
1.0
10
20 30 40 ID, DRAIN CURRENT(A)
50
60
Figure 12. On-Region Characteristics
1.8 1.6 1.4 1.2 1.0 0.8 0.6 -50 -25 0 25 50 75 100 125 150
Figure 13. Normalized on-Resistance vS Drain Current and Gate Voltage
14
rDS(on), DRAIN TO SOURCE ON-RESISTANCE (m)
PULSE DURATION = 300s DUTY CYCLE = 2.0%MAX
NORMALIZED DRAIN TO SOURCE ON-RESISTANCE
ID = 16A VGS =10V
12 10 8 6 4 2 2
ID = 8A
TJ = 125oC
TJ = 25oC
TJ, JUNCTION TEMPERATURE (oC)
4 6 8 VGS, GATE TO SOURCE VOLTAGE (V)
10
Figure 14. Normalized On-Resistance vs Junction Temperature
60
Figure 15. On-Resistance vs Gate to Source Voltage
60
ID, DRAIN CURRENT (A)
50 40 30 20 10 0 1.0
PULSE DURATION = 300s DUTY CYCLE = 2.0%MAX
IS, REVERSE DRAIN CURRENT (A)
VGS = 0V
VDD = 5V
10 1 0.1 0.01
TJ = -55oC TJ = 125oC
TJ =125oC TJ TJ = 25oC
TJ = 25oC
= -55oC
1.5 2.0 2.5 3.0 3.5 VGS, GATE TO SOURCE VOLTAGE (V)
4.0
1E-3 0.0
0.2 0.4 0.6 VSD, BODY DIODE FORWARD VOLTAGE (V)
0.8
Figure 16. Transfer Characteristics
Figure 17. Source to Drain Diode Forward Voltage vs Source Current
FDMS9600S Rev.D1
6
www.fairchildsemi.com
FDMS9600S Dual N-Channel PowerTrench(R) MOSFET
Typical Characteristics
VGS, GATE TO SOURCE VOLTAGE(V)
10
ID = 16A
5000
Ciss
VDD =10V
8 6
CAPACITANCE (pF)
VDD = 15V
1000
Coss
4 2 0
VDD = 20V
f = 1MHz VGS = 0V
Crss
0
10
20
30
40
50
100 0.1
Qg, GATE CHARGE(nC)
1 10 VDS, DRAIN TO SOURCE VOLTAGE (V)
30
Figure 18. Gate Charge Characteristics
Figure 19. Capacitance vs Drain to Source Voltage
FDMS9600S Rev.D1
7
www.fairchildsemi.com
FDMS9600S Dual N-Channel PowerTrench(R) MOSFET
Dimensional Outline and Pad Layout
FDMS9600S Rev.D1
8
www.fairchildsemi.com
FDMS9600S Dual N-Channel PowerTrench(R) MOSFET
TRADEMARKS The following includes registered and unregistered trademarks and service marks, owned by Fairchild Semiconductor and/or its global subsidiaries, and is not intended to be an exhaustive list of all such trademarks. Build it NowTM CorePLUSTM CorePOWERTM CROSSVOLTTM CTLTM Current Transfer LogicTM EcoSPARK(R) EfficentMaxTM EZSWITCHTM *
TM
(R)
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tm
F-PFSTM FRFET(R) Global Power ResourceSM Green FPSTM Green FPSTM e-SeriesTM GTOTM IntelliMAXTM ISOPLANARTM MegaBuckTM MICROCOUPLERTM MicroFETTM MicroPakTM MillerDriveTM MotionMaxTM Motion-SPMTM OPTOLOGIC(R) OPTOPLANAR(R)
(R)
tm
PowerTrench(R) Programmable Active DroopTM QFET(R) QSTM Quiet SeriesTM RapidConfigureTM
The Power Franchise(R)
tm
PDP SPMTM Power-SPMTM
TinyBoostTM TinyBuckTM TinyLogic(R) TINYOPTOTM TM TinyPowerTM Saving our world, 1mW /W /kW at a timeTM TinyPWMTM SmartMaxTM TinyWireTM SMART STARTTM SerDesTM SPM(R) STEALTHTM SuperFETTM UHC(R) SuperSOTTM-3 Ultra FRFETTM SuperSOTTM-6 UniFETTM SuperSOTTM-8 VCXTM SupreMOSTM VisualMaxTM SyncFETTM (R)
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ANTI-COUNTERFEITING POLICY Fairchild Semiconductor Corporation's Anti-Counterfeiting Policy. Farichild's Anti-Counterfeiting Policy is also stated on our external website, www.fairchildsemi.com, under Sales Support. Counterfeiting of semiconductor parts is a growing problem in the industry. All manufactures of semiconductor products are experiencing counterfeiting of their parts. Customers who inadvertently purchase counterfeit parts experience many problems such as loss of brand reputation, substandard performance, failed application, and increased cost of production and manufacturing delays. Fairchild is taking strong measures to protect ourselves and our customers from the proliferation of counterfeit parts. Farichild strongly encourages customers to purchase Farichild parts either directly from Fairchild or from Authorized Fairchild Distributors who are listed by country on our web page cited above. Products customers buy either from fairchild directly or from Authorized Fairchild Distributors are genuine parts, have full traceability, meet Fairchild's quality standards for handing and storage and provide access to Farichild's full range of up-to-date technical and product information. Fairchild and our Authorized Distributors will stand behind all warranties and will appropriately address and warranty issues that may arise. Fairchild will not provide any warranty coverage or other assistance for parts bought from Unauthorized Sources. Farichild is committed to combat this global problem and encourage our customers to do their part in stopping this practice by buying direct or from authorized distributors. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Advance Information Preliminary No Identification Needed Obsolete Product Status Formative / In Design First Production Full Production Not In Production Definition Datasheet contains the design specifications for product development. Specifications may change in any manner without notice. Datasheet contains preliminary data; supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice to improve design. Datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice to improve the design. Datasheet contains specifications on a product that is discontinued by Fairchild Semiconductor. The datasheet is for reference information only.
Rev. I36


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